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Panasonic Launches Production of Molded Underfill Semiconductor Encapsulation Materials in Shanghai

Friday, February 9, 2018
Panasonic Launches Production of Molded Underfill Semiconductor Encapsulation Materials in Shanghai
2018/02/09

Panasonic will launch the mass production of molded underfill semiconductor encapsulation materials in Shanghai, China in response to the increased production of leading-edge semiconductor packages in the region. This added capacity will enable Panasonic to provide faster and more efficient service to customers in China. 


Panasonic Industrial Devices Materials (Shanghai) Co., Ltd.

Osaka, Japan - Panasonic Corporation announced today that Panasonic Industrial Devices Materials (Shanghai) Co., Ltd. (PIDMSH) will start high-volume manufacturing of molded underfill (MUF)[1] materials for advanced semiconductor packages in March 2018 in response to the increasing demand for these products in China. 

Along with the increasing domestic demand and growing exports, Chinese electronics manufacturers are increasing production of smartphones and other portable electronic devices. As a result, outsourced semiconductor assembly, test contractors(OSATs) and other semiconductor manufacturers are boosting their production volumes. The higher performance and increased functionality of new smartphones is driving high-density semiconductor packaging technology development. As a result,, demand for MUF materials is growing. To provide faster and more efficient service for semiconductor packaging customers in China, Panasonic will launch the production of MUF materials at PIDMSH in March 2018.

What are MUF materials?

MUF materials are designed to encapsulate and protect the Flip chip semiconductor die and the electrical connections between the die[2] and the semiconductor package circuit board. MUF materials encapsulate the entire semiconductor package without the need for a subsequent underfilling process. 

[Features of Panasonic’s MUF materials]

    Panasonic materials flow easily into the narrow gap between the flip chip, package substrate and around the narrow terminal pitches that are characteristic of these package designs. Designed for high reliability, these materials are suitable for applications such as smartphones and other portable electronic devices. 
    Low thermal shrinkage and controlled elasticity enable high adhesion and reduced warpage over wide range of temperatures to insure semiconductor package reliability. 

In addition to the production site in China, Panasonic produces MUF materials in Yokkaichi-city, Mie Prefecture in Japan. 

Company overview

Company name                 Panasonic Industrial Devices Materials (Shanghai) Co., Ltd.  
Location            148, Huancheng North St., Comprehensive Industrial Development Zone, Shanghai, China          
Founded            October 2001 
Representative                  Takashi Sakamoto (General Manager) 
Main production items             Thermosetting resin molding compounds (heat-resistant phenolic resin molding compounds for automotive electric system parts, etc.), engineering plastics, and semiconductor encapsulation materials 
(* MUF materials production will start in March 2018)   

Remarks 

Panasonic’s MUF materials will be exhibited at SEMICON China 2018 from March 14 to 16, 2018 at the Shanghai New International Expo Center. 

Term description

[1] Molded underfill (MUF) 
This semiconductor packaging molding method encapsulates the entire flip chip die including filling the narrow gaps between the die and the circuit board using a specially formulated mold compound. The material surrounds and protects the electrical interconnects (bumps, etc.), and encapsulates the entire package structure. 

[2]Flip chip semiconductor die and the electrical connections between the die 
    This interconnection method orients the circuit surface of a silicon chip facing downward toward the package circuit board and provides mechanical and electrical connections by using copper bumps, solder balls etc. This term is used in contrast with the interconnection method that electrically connects the contact pads on the chip surface to the package terminals with wire bonding. 
Source: http://news.panasonic.com

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